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authorVG <vg@devys.org>2015-01-28 00:03:35 +0100
committerVG <vg@devys.org>2015-01-28 00:03:35 +0100
commitcbb3c9832bbe31d741930d43d3e21a04abeb12f8 (patch)
tree1338bc0b6786a745d5d920b1aa6b2c0d1e645e5c /uart.h
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Diffstat (limited to 'uart.h')
-rw-r--r--uart.h76
1 files changed, 76 insertions, 0 deletions
diff --git a/uart.h b/uart.h
new file mode 100644
index 0000000..22e0655
--- /dev/null
+++ b/uart.h
@@ -0,0 +1,76 @@
+/* #define F_CPU 16000000UL <= defined in Makefile */
+#define BAUD 9600
+
+/* This file is *highly* inspired from:
+ * http://www.appelsiini.net/2011/simple-usart-with-avr-libc
+ */
+
+#include <util/setbaud.h>
+
+#if 0
+static inline void uart_init()
+{
+ UCSRB |= (1 << RXEN) | (1 << TXEN);
+ UCSRC |= (1 << UCSZ0) | (1 << UCSZ1);
+#define BAUD 115200
+#include <util/setbaud.h>
+ UBRRH = UBRRH_VALUE;
+ UBRRL = UBRRL_VALUE;
+#if USE_2X
+ UCSRA |= (1 << U2X);
+#else
+ UCSRA &= ~(1 << U2X);
+#endif
+}
+#endif
+
+void uart_init(void)
+{
+ UBRR0H = UBRRH_VALUE;
+ UBRR0L = UBRRL_VALUE;
+
+#if USE_2X
+ UCSR0A |= _BV(U2X0);
+#else
+ UCSR0A &= ~(_BV(U2X0));
+#endif
+
+ UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); /* 8-bit data */
+ UCSR0B = _BV(RXEN0) | _BV(TXEN0); /* Enable RX and TX */
+}
+
+void uart_putchar(char c)
+{
+ UDR0 = c;
+ loop_until_bit_is_set(UCSR0A, TXC0); /* Wait until transmission ready. */
+}
+
+char uart_getchar(void)
+{
+ loop_until_bit_is_set(UCSR0A, RXC0); /* Wait until data exists. */
+ return UDR0;
+}
+
+#if 0
+/* alternatives for stream uses */
+void uart_putchar(char c, FILE *stream)
+{
+ if (c == '\n') {
+ uart_putchar('\r', stream);
+ }
+ loop_until_bit_is_set(UCSR0A, UDRE0);
+ UDR0 = c;
+}
+
+char uart_getchar(FILE *stream)
+{
+ loop_until_bit_is_set(UCSR0A, RXC0); /* Wait until data exists. */
+ return UDR0;
+}
+#endif
+
+#if 0
+FILE uart_output = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
+FILE uart_input = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);
+FILE uart_io FDEV_SETUP_STREAM(uart_putchar, uart_getchar, _FDEV_SETUP_RW);
+#endif